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No. Project Title Category
1 Â÷·® ³×ºñ°ÔÀ̼ǿë Host CPU¿Í ¸ÖƼ¹Ìµð¾î µð¹ÙÀ̽º°£ÀÇ ÀÎÅÍÆäÀ̽º FPGA °³¹ß FPGA Design Service
2 ÀÇ·á ¿µ»ó µ¥ÀÌÅ͸¦ Giga-bit EthernetÀ¸·Î PC¿¡ Àü¼ÛÇÏ´Â Ç÷§Æû °³¹ß System Design Service
3 High Speed Analog Control & Sampled DataÀ» PCIe¸¦ ÅëÇÏ¿© Host PC¿¡ Data¸¦ Àü´ÞÇÏ´Â
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System Design Service
4 Full-HD HDMI/3G-SDI ¿µ»óÁö¿ø FPGA Ç÷§Æû °³¹ß System Design Service
5 SDIO Interface¸¦ ÅëÇÑ PDA ´Ü¸»±â °£ÀÇ VLC(Visible Light Communication) Åë½Å Card °³¹ß System Design Service
6 ARM PB º¸µå¿Í ¿¬°áÇÑ ¿µ»ó, À½¼º µîÀÇ ¾îÇø®ÄÉÀÌ¼Ç ASICĨ °ËÁõÀ» À§ÇÑ Test ¹× Demo Platform °³¹ß System Design Service
7 ARM Bus Interface VLC(Visible Light Communication)Åë½Å Ç÷§Æû º¸µå °³¹ß System Design Service
8 Àü±â ÀÚµ¿Â÷¿ë BMS (Battery Management System) °³¹ß System Design Service
9 ÃÊÀ½ÆÄ ÀÇ·á±â±â¿ë FPGA °³¹ß FPGA Design Service
10 LCD »ý»ê ¼³ºñ¿ë Inkjet Head Controller FPGA ¹× º¸µå °³¹ß System Design Service
11 PDA¿ë Áøµ¿°èÃø È®ÀåÆÑ °³¹ß FPGA Design Service
12 USN ±â¹ÝÀÇ »êºÒ Á¶±â °¨Áö¿ë ¼¾¼­ ³×Æ®¿öÅ© ±â¹ÝÀÇ ¿ø°Ý ¸ð´ÏÅ͸µ ½Ã½ºÅÛ °³¹ß System Design Service
13 ¸ÖƼ¹Ìµð¾î IC °³¹ß ¹× °ËÁõ Ç÷§Æû °³¹ß FPGA Design Service
14 DMD(Digital Mirror Device) Á¦¾î¿ë FPGA ¹× º¸µå °³¹ß FPGA Design Service
15 À§¼ºÇ×¹ý Áö»ó±¹¿ë °íÁ¤¹Ð ¼ö½Å±â ¾Ë°í¸®Áò °ËÁõÀ» À§ÇÑ Çϵå¿þ¾î Ç÷¿Æû¿¡ Àû¿ë ÇÒ FPGA
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FPGA Design Service
16 ´Ù±â´É TETRA °ÔÀÌÆ®¿þÀÌ °³¹ß System Design Service
17 DVR SystemÀ» À§ÇÑ Xilinx FPGA µðÀÚÀÎ ¹× °ËÁõ °³¹ß ¿ë¿ª FPGA Design Service
18 ±¤¼¶À¯ ÀÚµ¿ À¶Âø±â¿ë ¿µ»ó ½ÅÈ£ ó¸® FPGA °³¹ß FPGA Design Service
19 ´Éµ¿´ëó¿ë ÀÓº£µðµå Ç÷§Æû °³¹ß
System Design Service
 
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